The field of invention relates generally to circuit design and semiconductor manufacturing; and, more specifically, to a method and apparatus for automatically laying out a circuit structure.
Transistor Technology
FIGS. 1a through 1c relate to transistor technology. Transistors are fundamental units of current and/or voltage control in a semiconductor device. As electronic devices (e.g., semiconductor chips) process information by controlling applicable currents and/or voltages (e.g., in digital applications, cutting off current flow so as to represent a binary xe2x80x9c0xe2x80x9d while allowing current to flow so as to represent a binary xe2x80x9c1xe2x80x9d), transistors are the fundamental electronic units by which currents and/or voltages are controlled so as to effectively process information.
A semiconductor chip is typically formed by integrating up to millions (and perhaps someday billions) of transistors onto a single xe2x80x9cchipxe2x80x9d of semiconductor material (e.g., silicon (Si)). By so doing, vast quantities of information can be electronically processed at high speed within relatively small (e.g., thumbnail sized) devices. FIG. 1a shows a standard depiction of what a transistor 101a may xe2x80x9clook-likexe2x80x9d in schematic form (e.g., as drawn by electrical engineers when designing a circuit at the transistor level of detail). FIGS. 1b and 1c show how the transistor 101a of FIG. 1a may be constructed with specific metal traces (amongst other features) that are formed over or upon the surface of semiconductor material.
Referring to FIG. 1a (which shows a specific type of transistor referred to as an N type Metal Oxide Semiconductor Field Effect Transistor (MOSFET)), note that a transistor typically has three nodes 102a, 103a, 104a. Generally, one node is used to help control whether or not (and if so, how much) current is allowed to flow between the other two nodes. Accordingly, node 102a (which is often referred to as a xe2x80x9cgatexe2x80x9d node) corresponds to the first node described above; and, nodes 103a and 104a correspond to the other two nodes described above (which are often referred to as the xe2x80x9cdrainxe2x80x9d and xe2x80x9csourcexe2x80x9d nodes, respectively)
The transistor 101a of FIG. 1a is designed from the perspective that current is designed to flow xe2x80x9cinto the drainxe2x80x9d node 103a and xe2x80x9cout of the sourcexe2x80x9d node 104a. Thus, current flow 110 corresponds to a typical flow of current that may pass through transistor 101a. Here, as electrical current corresponds to a xe2x80x9cflowxe2x80x9d of electrons (which may be viewed, to some extent, as behaving similar to a flow of water); and, as electrons are negatively charged, current flow (in terms of a flow of positive charge) is opposite in direction to the flow of electrons. Thus, when current is flowing xe2x80x9cintoxe2x80x9d the drain node 103a and xe2x80x9cout of xe2x80x9d the source node 104a as depicted by current flow 110; in actuality, electrons are flowing from the source node 104a to the drain node 103a according to electron flow 111.
Here, the terminology used for the transistor nodes are readily understandable if the transistor is analogized to a kitchen sink. That is, the transistor has a xe2x80x9csourcexe2x80x9d of electrons from which electrons flow into the transistor (e.g., like a faucet acts as a source of water that flows into a sink), a xe2x80x9cdrainxe2x80x9d that collects the flow of electrons to remove electrons from the transistor (e.g., like a drain that acts to empty the flow of water from a sink); and, a xe2x80x9cgatexe2x80x9d for controlling the magnitude of the electron flow (i.e, the amount of current) (e.g., as the position of a water faucet handle or knob controls the flow of water into a sink). Generally, the magnitude and polarity of voltage applied to the gate node 102a (with respect to the source node 104a) determines the magnitude of electron flow for the transistor 101a if its current flow 110 is not otherwise constrained or controlled (e.g., by other transistors to which transistor 101a is coupled).
FIGS. 1b and 1c describe how the transistor 101a of FIG. 1a can be manufactured over/upon an area of semiconductor material according to two different topological perspectives. Here, FIG. 1b corresponds to a xe2x80x9ctop viewxe2x80x9d of a transistor (i.e., looking down over a the semiconductor surface 105b); while, FIG. 1c corresponds to a xe2x80x9ccross sectionxe2x80x9d of a transistor (i.e., looked at from the side of the transistor itself.). Referring to both FIGS. 1b and 1c, the source node 104a of FIG. 1a is constructed with source wiring 104b, 104c; the drain node 103a is constructed with drain wiring 103b and drain contact 107b, 107c; and the gate node 102a of FIG. 1a is constructed with gate wiring 102b1, 102c1, gate via 106b, 106c, and gate structure 102b2 and 102c2. Note that, as a characteristic of MOS devices (Referring to FIG. 1c), a layer of oxide 112c resides between the gate structure 102c2 and the semiconductor material 105c. 
If electrons are to flow according to the electron flow 111 observed in FIG. 1a, referring now to FIG. 1b and 1c, electrons will flow from source wiring fingers 104b1 and 104b2. Here, electrons will flow within diffusion region 108b: 1) from source wiring finger 104b1 beneath gate finger 102b2a to drain contact 107b, 107c (i.e., in the +x direction); and, 2) from source wiring finger 102b2a beneath gate finger 104b2b toward drain contact 107b, 107c (i.e., in the xe2x88x92x direction). The diffusion region 108b (and 108c of FIG. 1c) is a conducting region of the semiconductor surface 105b that is more conducting that the surrounding semiconductor surface area outside the diffusion region.
The diffusion region 108b, 108c is typically formed by implanting xe2x80x9cdopantxe2x80x9d or xe2x80x9cimpurityxe2x80x9d atoms (e.g., Boron (B), Phosphorous (P)) into the semiconductor surface so as to improve its electrical conductivity (e.g., which, in effect, converts the xe2x80x9csemi-conductorxe2x80x9d to a material that is more akin to a xe2x80x9cconductorxe2x80x9d within the diffusion region 108b, 108c). The formation of a diffusion region 108b, 108c helps keep transistors isolated from one another by limiting their conducting regions to specified regions within the semiconductor material. The diffusion region 108b, 108c is also frequently referred to as an xe2x80x9cactive regionxe2x80x9d, xe2x80x9can active device regionxe2x80x9d, xe2x80x9can implant regionxe2x80x9d and the like.
Note that two different paths are created for the transistor""s xe2x80x9csource-to-drainxe2x80x9d electron flow 111. The use of two different paths effectively allows the transistor to be xe2x80x9cpackedxe2x80x9d into a dense structure which provides, in turn, additional space on the semiconductor surface 105b (e.g., where additional transistors may be formed). As such, the use of two different electron flow paths tends to optimize the efficiency of the semiconductor surface area that is consumed by the transistor devices formed thereon. Continuing then with a discussion of electron flow through the transistor, once electrons reach the drain contact (from either direction) they flow xe2x80x9cupxe2x80x9d the drain contact 107b, 107c (i.e., in the +z direction) and then along drain wiring 103b, 103c (along the x axis).
Note that the amount of electrons available for flow (e.g., which is directly related to the amount of current flow through the transistor) is largely controlled by the voltage established between the gate fingers 102b2a and 102b2b and their respective source fingers 104b1 and 104b2 (i.e., the voltage between fingers 102b2a and 104b1 helps determine the electron amount that flows in the +x direction; and, the voltage between fingers 102b2a and 104b2 helps determine the electron amount that flows in the xe2x88x92x direction). Such a voltage, when applied along gate wiring 102b1, should appear along the entire gate structure 102b2 (including gate fingers 102b2a and 102b2b) because of the electrical conductivity provided by gate via 106b, 106c).
Given this description, referring to FIG. 1b, it is clear that source wiring 104b and fingers 104b1, 104b2; drain contact 107b and wiring 103b; and gate structure 102b2 and wiring 102b1 and via 106b are made of conducting materials. Frequently, xe2x80x9cwiringxe2x80x9d, vias and contacts are made of metal (such as Aluminum (Al), Copper (Cu), Tungsten, etc.) or metal alloys. Note that the source wiring 104b runs over the surface of the semiconductor material as a form of xe2x80x9clocal interconnectxe2x80x9d that, for example, may be made with material(s) from which contacts are also made. The gate structure 102b2 is often made of silicon that is deposited onto the oxide layer 112c (referring briefly to FIG. 1c) and doped (similar to the diffusion region 108b) so as to become highly conductive. Because of the deposition process employed in forming gate structure 102b2, the gate structure 102b2 typically possesses a polycrystalline microstructure which causes it to be frequently referred to in the art as the xe2x80x9cpoly layerxe2x80x9d 102b2 or simply the xe2x80x9cpolyxe2x80x9d 102b2.
Before continuing it is important to emphasize that xe2x80x9cotherxe2x80x9d types of transistors may be formed as the discussion above referred to just one type of transistor (i.e., an embodiment of an N type MOSFET transistor). The discussion above is also highly relevant to the formation of a P type MOSFET transistor (wherein an important distinguishing feature is that N type MOSFET transistors receive an xe2x80x9cacceptorxe2x80x9d type impurity in the diffusion region 108b whereas P type MOSFET transistors receive a xe2x80x9cdonorxe2x80x9d type impurity in the diffusion region 108b). Other types of transistors include bipolar, MESFET, and heterostructure transistors. Furthermore, as transistor manufacturing is an evolving process, various materials or other features are expected to change over time (e.g., by replacing oxide 112c layer with a higher K dielectric material as just one example).